/*
 * Copyright (c) Huawei Technologies Co., Ltd. 2022. All rights reserved.
 * Description: Header File, SML Table pub define
 * Create: 2022/01/08
 */

#ifndef SML_TABLE_PUB_H
#define SML_TABLE_PUB_H

#if (defined(PLATFORM_MODE_LLT) || defined(_lint))
#include "sml_table_define_llt.h"
#else
#if defined(SML_TBL_DEFINE_CLOUD)
#include "sml_table_define_cloud.h"
#elif defined(SML_TBL_DEFINE_COMPUTE_NIC)
#include "sml_table_define_compute_standard.h"
#elif defined(SML_TBL_DEFINE_COMPUTE_SMART_NIC)
#include "sml_table_define_compute_smart_nic.h"
#elif defined(SML_TBL_DEFINE_COMPUTE_DPU)
#include "sml_table_define_compute_dpu.h"
#elif defined(SML_TBL_DEFINE_COMPUTE_ROCE)
#include "sml_table_define_compute_roce.h"
#elif defined(SML_TBL_DEFINE_STORAGE_ROCE)
#include "sml_table_define_storage_roce.h"
#elif defined(SML_TBL_DEFINE_STORAGE_ROCEAA)
#include "sml_table_define_storage_roceaa.h"
#elif defined(SML_TBL_DEFINE_STORAGE_TIOE)
#include "sml_table_define_storage_toe.h"
#elif defined(SML_TBL_DEFINE_STORAGE_FC)
#include "sml_table_define_storage_fc_adapt.h"
#include "sml_table_define_storage_fc.h"
#endif
#endif

/* rx cqe checksum err */
#define NIC_RX_CSUM_IP_CSUM_ERR      (1 << 0)
#define NIC_RX_CSUM_TCP_CSUM_ERR     (1 << 1)
#define NIC_RX_CSUM_UDP_CSUM_ERR     (1 << 2)
#define NIC_RX_CSUM_IGMP_CSUM_ERR    (1 << 3)
#define NIC_RX_CSUM_ICMPv4_CSUM_ERR  (1 << 4)
#define NIC_RX_CSUM_ICMPv6_CSUM_ERR  (1 << 5)
#define NIC_RX_CSUM_SCTP_CRC_ERR     (1 << 6)
#define NIC_RX_CSUM_HW_BYPASS_ERR    (1 << 7)
#define NIC_RX_CSUM_IPSU_OTHER_ERR   (1 << 8)

/* ER Specification Definition */
#define L2_ER_SPEC                 8

/* Definition of Entry Specifications */
#define TBL_ID_FUNC_CFG_SPEC       4096
#define TBL_ID_PORT_CFG_SPEC       16
#define TBL_ID_MAC_SPEC            2048 /* 2K MAC table entry */
#define TBL_ID_VROCE_VNI_MAC_SPEC  256
#define TBL_ID_VROCE_VNI_MAC_IDX_STEP  2 /* 32B size hash table index step is 2 */
#define TBL_ID_MULTICAST_SPEC      2048
#define TBL_ID_ELB_SPEC            18432 /* 18K EBL table entry */
#define TBL_ID_FLEXQ_SPEC          8192
#define TBL_ID_FDIR_SPEC           512

#define TBL_ID_IPSEC_SPD_SPEC      2048
#define TBL_ID_IPSEC_SAD_SPEC      4096

/* VLAN Specification Definition */
#define NIC_VLAN_SPEC              4096
#define NIC_VLAN_BITNUM            12

/* Definition of Unicast MAC Addresses */
#define PF_UNICAST_MAC_SPEC        2
#define VF_UNICAST_MAC_SPEC        2

/* Unicast MAC address specification, fixed at 2K */
#define GLOBLE_UNICAST_MAC_SPEC    2048
/* Indicates the multicast MAC address specification. The value is fixed to 2K. */
#define GLOBLE_MULTICAST_MAC_SPEC  2048

/* Maximum number of PFs */
#define MAX_PF_NUM                 32

/* Bonding use paras, update lacpdu frame to sml */
#define LACPDU_BUSY                              0x1
#define LACPDU_IDLE                              0x0
#define LACPDU_VALID                             0x1
#define LACPDU_INVALID                           0x0
#define LACP_MAX_SIZE                            128 /* LACP协议报文最大size */
#define PER_PORT_USE_MAX_ENTRY_NUM               0x4
#define BOND_FWDID_NOPORT                        0xFFFF   /* invalid Bond forward id */

/*
 * SML Global Table Entry Divide:
 * entry 0  ~ 15   common & nic
 * entry 16 ~ 19   ovs
 * entry 20 ~ 23   roce
 * entry 24 ~ 27   toe
 * entry 28 ~ 31   plog
 */
#define GLB_TBL_COM_ID0                     0
#define GLB_TBL_COM_VER_ID1                 1
#define GLB_TBL_COM_FLUSH_GPA_BASE          8
#define GLB_TBL_COM_FLUSH_GPA_ID(host_id)   (GLB_TBL_COM_FLUSH_GPA_BASE + ((host_id) & 0x7))
#define GLB_TBL_OVS_ID16                    16
#define GLB_TBL_PPA_ID18                    18
#define GLB_TBL_ROCE_ID20                   20
#define GLB_TBL_TOE_CFG                     24
#define GLB_TBL_PLOG_NVME_ADDR_BASE         28 /* only ASIC use */
#define GLB_TBL_PLOG_NVME_ADDR_ID(nvme_id)  (GLB_TBL_PLOG_NVME_ADDR_BASE + (nvme_id))

/* *
 * Definition of the number of elements in an entry
 */
#define TBL_ID_ELB_ENTRY_ELEM_NUM         2
#define TBL_ID_VLAN_ENTRY_ELEM_NUM        8
#define TBL_ID_MULTICAST_ENTRY_ELEM_NUM   4
#define TBL_ID_TRUNKFWD_ENTRY_ELEM_NUM    32
#define TBL_ID_TAGGEDLIST_BITMAP32_NUM    4
#define TBL_ID_UNTAGGEDLIST_BITMAP32_NUM  4
#define TBL_ID_GLOBAL_QUEUE_NUM           4
#define TBL_ID_RSS_CONTEXT_NUM            4
#define TBL_ID_RSS_HASH_NUM               4

#define FDIR_CFG_TABLE_PACKET_TYPE_NUM 16

/* *
 * Maximum number of HCAR
 */
#define QOS_MAX_HCAR_NUM 12

/* *
 * Definitions of VLAN Table, Multicast Table, and ELB Table
 * Includes the indexes of Table index and sub id.
 */
#define NIC_DEFAULT_VLAN0 0
#define INVALID_ELB_INDEX 0


/* ESL/EMU/EDA supports 16ER * 4K VLAN. One entry stores eight VLANs. */
#define GET_VLAN_TABLE_INDEX(er_id, vlan_id) ((((er_id) & 0xF) << 9) | (((vlan_id) & 0xFFF) >> 3))

#define GET_VLAN_ENTRY_SUBID(vlan_id) ((vlan_id) & 0x7)

#define GET_VLAN_FLITER_INDEX(func_id, vlan_id) (((func_id) << NIC_VLAN_BITNUM) | (vlan_id))

#define GET_FDIR_TABLE_INDEX(func_id) (((func_id) & 0x3ff) << 4)
#define GET_FDIR_ENTRY_SUBID(packet_type) ((packet_type) & 0xf)

#define FDIR_PKT_TYPE_EN_OFFSET 15
#define FDIR_QID_MASK 0x1fff
#define FDIR_INVALID_QID 0xffff

#define GET_MULTICAST_TABLE_INDEX(mc_id) ((mc_id) >> 2)
#define GET_MULTICAST_ENTRY_SUBID(mc_id) ((mc_id) & 0x3)

#define GET_ELB_TABLE_INDEX(elb_id) ((elb_id) >> 1)
#define GET_ELB_ENTRY_SUBID(elb_id) ((elb_id) & 0x1)

/* *
 * Calculation of the Access Value Offset of taggedlist_table and untaggedlist_table
 */
#define GET_TAGLIST_TABLE_INDEX(list_id, vlan_id) (((list_id) << 5) | (((vlan_id) & 0xFFF) >> 7))
#define GET_TAGLIST_TABLE_BITMAP_IDX(vlan_id) (((vlan_id) >> 5) & 0x3)
#define GET_TAGLIST_TABLE_VLAN_BIT(vlan_id) (0x1UL << ((vlan_id) & 0x1F))

#define TRUNK_FWDID_NOPORT 0xFFFF


/* *
 * Macro definition related to OVS QOS
 */
#define CAR_TABLE_OVS_QOS_BUM_LIMIT_BASE              0
#define CAR_TABLE_OVS_QOS_IP_FRAG_UPCALL_LIMIT_BASE   1024
#define CAR_TABLE_OVS_QOS_UPCALL_LIMIT_BASE           1025
#define CAR_TABLE_OVS_CAPTURE_LIMIT_BASE              1281
#define CAR_TABLE_NIC_POLICING_BASE                   1792
#define CAR_TABLE_ROCE_CC_BASE                        1920 // CAR_TABLE_NIC_POLICING_BASE + 128

#define OVS_QOS_BUM_LIMIT_CAR_ID(func_id)          (CAR_TABLE_OVS_QOS_BUM_LIMIT_BASE + ((func_id) & 0x3ff))
#define OVS_QOS_UPCALL_LIMIT_CAR_ID(func_id)       (CAR_TABLE_OVS_QOS_UPCALL_LIMIT_BASE + ((func_id) & 0xff))
#define OVS_CAPTURE_LIMIT_CAR_ID(index)            (CAR_TABLE_OVS_CAPTURE_LIMIT_BASE + ((index) & 0x7))
#define OVS_QOS_IP_FRAG_UPCALL_LIMIT_CAR_ID        CAR_TABLE_OVS_QOS_IP_FRAG_UPCALL_LIMIT_BASE

#define NIC_QOS_POLICING_CAR_NUM_PER_PORT 32
#define NIC_QOS_POLICING_ICMP_CAR_NUM_PER_PORT 2
#define NIC_CAR_ID_PER_TYPE    4
#define NIC_CAR_ID_TYPE_MASK   0x3

#define NIC_QOS_POLICING_CAR_ID(port_id, index) \
    (CAR_TABLE_NIC_POLICING_BASE + (((port_id) * NIC_QOS_POLICING_CAR_NUM_PER_PORT) + (index)))

#define NIC_QOS_POLICING_ARP_CAR_ID(port_id, index, i) \
    (CAR_TABLE_NIC_POLICING_BASE + (((port_id) * NIC_QOS_POLICING_CAR_NUM_PER_PORT) + \
    ((index) * NIC_CAR_ID_PER_TYPE) + ((i) & NIC_CAR_ID_TYPE_MASK)))

#define OVS_SP_VLAN_NUM_PER_ITEM 16
#define OVS_QOS_WRED_CAR_ID(index)                  ((index) & 0x3FF)

/* NIC CAR */
#define NIC_CAR_FOR_LLDP   0
#define NIC_CAR_FOR_LACP   1
#define NIC_CAR_FOR_ICMP   2
#define NIC_CAR_FOR_ARP    3

/* *
 * definition related to OVS MIRROR QOS (OVS_MIRROR_CAR_TABLE)
 */
typedef enum {
    OVS_MIRROR_QOS_TYPE_BW = 0,
    OVS_MIRROR_QOS_TYPE_PPS
} ovs_mirror_qos_type_e;

#define OVS_MIRROR_CAR_TABLE_QOS_PORT_BASE                   2048
#define OVS_MIRROR_QOS_VM_CAR_ID(mirror_qos_type, vm_id) \
    ((((u32)(mirror_qos_type)) * 1024)  + ((vm_id) & 0x3FF))
#define OVS_MIRROR_QOS_PORT_CAR_ID(mirror_qos_type, index)       \
    (OVS_MIRROR_CAR_TABLE_QOS_PORT_BASE + ((((u32)(mirror_qos_type)) & 0x1) << 2) + ((index) & 0x3))

/* set arp and icmp car parameter */
#define ANTI_ATTACK_DEFAULT_CIR			500000
#define ANTI_ATTACK_DEFAULT_XIR			600000
#define ANTI_ATTACK_DEFAULT_CBS			10000000
#define ANTI_ATTACK_DEFAULT_XBS			12000000

/* *
 * Definition of the MAC Type
 */
typedef enum {
    MAC_TYPE_UC = 0,
    MAC_TYPE_BC,
    MAC_TYPE_MC,
    MAC_TYPE_RSV
} mac_type_e;

/* *
 * Ethernet Port Definition
 */
typedef enum {
    MAG_ETH_PORT0 = 0,
    MAG_ETH_PORT1,
    MAG_ETH_PORT2,
    MAG_ETH_PORT3,
    MAG_ETH_PORT4,
    MAG_ETH_PORT5,
    MAG_ETH_PORT6,
    MAG_ETH_PORT7,
    MAG_ETH_PORT8,
    MAG_ETH_PORT9
} mag_eth_port_e;

/* *
 * Defines the VLAN filtering type.
 */
typedef enum {
    NIC_VLAN_NORMAL_FILTER = 0,
    NIC_VLAN_QINQ_FILTER,
    NIC_VLAN_MODE_MAX
} nic_vlan_mode_e;

/* *
 * Indicates the type of the MAC table forwarding port.
 */
typedef enum {
    NIC_FWD_TYPE_FUNCTION = 0, /* forward type function */
    NIC_FWD_TYPE_VMDQ,         /* forward type function-queue(vmdq) */
    NIC_FWD_TYPE_PORT,         /* forward type port */
    NIC_FWD_TYPE_RSVD,         /*  */
    NIC_FWD_TYPE_TRUNK,        /* forward type trunk */
    NIC_FWD_TYPE_DP,           /* forward type DP */
    NIC_FWD_TYPE_MC,           /* forward type multicast */

    /* The START: is not used and needs to be deleted. */
    NIC_FWD_TYPE_MPU, /* forward type broadcast */
    NIC_FWD_TYPE_PF,  /* forward type pf */
    /* The END: is not used and needs to be deleted. */

    NIC_FWD_TYPE_NULL /* forward type null */
} nic_fwd_type_e;

/* ACL key type */
enum {
    ACL_KEY_IPV4 = 0,
    ACL_KEY_IPV6
};

/* ACL filter action */
enum {
    ACL_ACTION_PERMIT = 0,
    ACL_ACTION_DENY
};

/* ACL action button */
enum {
    ACL_ACTION_OFF = 0,
    ACL_ACTION_ON
};

/* ACL statistic action */
enum {
    ACL_ACTION_NO_COUNTER = 0,
    ACL_ACTION_COUNT_PKT,
    ACL_ACTION_COUNT_PKT_LEN
};

/* ACL redirect action */
enum {
    ACL_ACTION_FORWAR_UP = 1,
    ACL_ACTION_FORWAR_PORT,
    ACL_ACTION_FORWAR_NEXT_HOP,
    ACL_ACTION_FORWAR_OTHER
};

enum {
    CEQ_TIMER_STOP = 0,
    CEQ_TIMER_START
};

enum {
    CEQ_API_DISPATCH = 0,
    CEQ_API_NOT_DISPATCH
};

enum {
    NO_EVENT = 0,
    CEQ_MODE = 1,
    INT_MODE
};

enum {
    ER_MODE_VEB,
    ER_MODE_VEPA,
    ER_MODE_MULTI,
    ER_MODE_NULL
};

#endif /* L2_TABLE_PUB_H */
